#			--------------------------------------------------------------- book 0 is selected
w 30 00 00 
w 30 7f 00 
#			# reg[  0][  0][  1] = 0x01	; Initialize the device through software reset
w 30 01 01 
#			--------------------------------------------------------------- book 120 is selected
w 30 7f 78 
#			# reg[120][0][24] = 0x80	; 1 cycle jump
w 30 18 80 
#			# reg[120][  0][ 50] = 0x88	; Interpolation Ratio is 8, FIFO=Enabled
w 30 32 88 
#			# reg[120][  0][ 24] = 0x80       ; set to 1-cycle jump for RevD silicon
w 30 18 80 
#			--------------------------------------------------------------- book 100 is selected
w 30 7f 64 
#			# reg[100][  0][ 50] = 0xa4	; Decimation Ratio is 4, CIC AutoNorm = Enabled, FIFO=Enabled
w 30 32 a4 
#			--------------------------------------------------------------- book 0 is selected
w 30 7f 00 
#			# reg[  0][  0][ 60] = 0x80	; Interpolation Ratio is 4, FIFO=Enabled; Decimation Ratio is 2, CIC AutoNorm = Enabled, FIFO=Enabled; Interpolation Ratio is 2, FIFO=Enabled; Decimation Ratio is 1, CIC AutoNorm = Enabled, FIFO=Enabled; Use miniDSP_D for signal processing, sync mode
w 30 3c 80 
#			--------------------------------------------------------------- book 100 is selected
w 30 7f 64 
#			# reg[100][  0][ 20] = 0x00	; Disable ADC double buffer mode
w 30 14 00 
#			--------------------------------------------------------------- book 120 is selected
w 30 7f 78 
#			# reg[120][  0][ 20] = 0x00	; Disable DAC double buffer mode
w 30 14 00 
#			--------------------------------------------------------------- book 0 is selected
w 30 7f 00 
#			# reg[  0][  0][ 61] = 0x00	; Use miniDSP_D for signal processing; Enable ADC double buffer mode; Enable DAC double buffer mode; Use miniDSP_A for signal processing
w 30 3d 00 
#			--------------------------------------------------------------- book 40 is selected
w 30 7f 28 
#			# reg[ 40][  0][  1] = 0x04       ; adaptive mode for miniDSP_A
w 30 01 04 
#			--------------------------------------------------------------- book 80 is selected
w 30 7f 50 
#			# reg[ 80][  0][  1] = 0x04	; adaptive mode for miniDSP_D
w 30 01 04 
#			--------------------------------------------------------------- book 100 is selected
w 30 7f 64 
#			# reg[100][0][48] = 24
w 30 30 18 
#			# reg[100][0][49] = 0
w 30 31 00 
#			--------------------------------------------------------------- book 120 is selected
w 30 7f 78 
#			# reg[120][0][48] = 24
w 30 30 18 
#			# reg[120][0][49] = 0
w 30 31 00 
#			# reg[120][0][24]=0x80
w 30 18 80 
#			--------------------------------------------------------------- book 40 is selected
w 30 00 00 
w 30 7f 28 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 0
w 30 08 ff 
#			 (Bit 23-16)
w 30 09 ff 
#			 (Bit 15-8)
w 30 0a ff 
#			 (Bit 7-0)
w 30 0b 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 1
w 30 0c 80 
#			 (Bit 23-16)
w 30 0d 00 
#			 (Bit 15-8)
w 30 0e 00 
#			 (Bit 7-0)
w 30 0f 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 2
w 30 10 7f 
#			 (Bit 23-16)
w 30 11 ff 
#			 (Bit 15-8)
w 30 12 ff 
#			 (Bit 7-0)
w 30 13 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 3
w 30 14 40 
#			 (Bit 23-16)
w 30 15 00 
#			 (Bit 15-8)
w 30 16 00 
#			 (Bit 7-0)
w 30 17 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 4
w 30 18 00 
#			 (Bit 23-16)
w 30 19 00 
#			 (Bit 15-8)
w 30 1a 00 
#			 (Bit 7-0)
w 30 1b 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 5
w 30 1c 00 
#			 (Bit 23-16)
w 30 1d 00 
#			 (Bit 15-8)
w 30 1e a4 
#			 (Bit 7-0)
w 30 1f 00 
#			--------------------------------------------------------------- page 9 is selected
w 30 00 09 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 256
w 30 48 ff 
#			 (Bit 23-16)
w 30 49 ff 
#			 (Bit 15-8)
w 30 4a ff 
#			 (Bit 7-0)
w 30 4b 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 257
w 30 4c 80 
#			 (Bit 23-16)
w 30 4d 00 
#			 (Bit 15-8)
w 30 4e 00 
#			 (Bit 7-0)
w 30 4f 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 258
w 30 50 7f 
#			 (Bit 23-16)
w 30 51 ff 
#			 (Bit 15-8)
w 30 52 ff 
#			 (Bit 7-0)
w 30 53 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 259
w 30 54 40 
#			 (Bit 23-16)
w 30 55 00 
#			 (Bit 15-8)
w 30 56 00 
#			 (Bit 7-0)
w 30 57 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 260
w 30 58 00 
#			 (Bit 23-16)
w 30 59 00 
#			 (Bit 15-8)
w 30 5a 00 
#			 (Bit 7-0)
w 30 5b 00 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 261
w 30 5c 00 
#			 (Bit 23-16)
w 30 5d 00 
#			 (Bit 15-8)
w 30 5e a4 
#			 (Bit 7-0)
w 30 5f 00 
#			--------------------------------------------------------------- book 20 is selected
w 30 00 00 
w 30 7f 14 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB ADC COEFF No. 2048
w 30 08 c0 
#			 (Bit 23-16)
w 30 09 00 
#			 (Bit 15-8)
w 30 0a 00 
#			 (Bit 7-0)
w 30 0b 00 
#			--------------------------------------------------------------- book 100 is selected
w 30 00 00 
w 30 7f 64 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB ADC INST No. 0
w 30 08 18 
#			 (Bit 23-16)
w 30 09 00 
#			 (Bit 15-8)
w 30 0a 60 
#			 (Bit 7-0)
w 30 0b 05 
#			 (Bit 31-24) ------------ MSB ADC INST No. 1
w 30 0c 18 
#			 (Bit 23-16)
w 30 0d 00 
#			 (Bit 15-8)
w 30 0e 60 
#			 (Bit 7-0)
w 30 0f 07 
#			 (Bit 31-24) ------------ MSB ADC INST No. 2
w 30 10 0c 
#			 (Bit 23-16)
w 30 11 02 
#			 (Bit 15-8)
w 30 12 00 
#			 (Bit 7-0)
w 30 13 03 
#			 (Bit 31-24) ------------ MSB ADC INST No. 3
w 30 14 0c 
#			 (Bit 23-16)
w 30 15 02 
#			 (Bit 15-8)
w 30 16 20 
#			 (Bit 7-0)
w 30 17 03 
#			 (Bit 31-24) ------------ MSB ADC INST No. 4
w 30 18 18 
#			 (Bit 23-16)
w 30 19 00 
#			 (Bit 15-8)
w 30 1a 60 
#			 (Bit 7-0)
w 30 1b 01 
#			 (Bit 31-24) ------------ MSB ADC INST No. 5
w 30 1c 18 
#			 (Bit 23-16)
w 30 1d 00 
#			 (Bit 15-8)
w 30 1e 60 
#			 (Bit 7-0)
w 30 1f 03 
#			 (Bit 31-24) ------------ MSB ADC INST No. 6
w 30 20 0c 
#			 (Bit 23-16)
w 30 21 00 
#			 (Bit 15-8)
w 30 22 00 
#			 (Bit 7-0)
w 30 23 03 
#			 (Bit 31-24) ------------ MSB ADC INST No. 7
w 30 24 0c 
#			 (Bit 23-16)
w 30 25 00 
#			 (Bit 15-8)
w 30 26 20 
#			 (Bit 7-0)
w 30 27 03 
#			 (Bit 31-24) ------------ MSB ADC INST No. 8
w 30 28 58 
#			 (Bit 23-16)
w 30 29 60 
#			 (Bit 15-8)
w 30 2a 00 
#			 (Bit 7-0)
w 30 2b 05 
#			 (Bit 31-24) ------------ MSB ADC INST No. 9
w 30 2c 00 
#			 (Bit 23-16)
w 30 2d 00 
#			 (Bit 15-8)
w 30 2e 00 
#			 (Bit 7-0)
w 30 2f 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 10
w 30 30 00 
#			 (Bit 23-16)
w 30 31 00 
#			 (Bit 15-8)
w 30 32 00 
#			 (Bit 7-0)
w 30 33 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 11
w 30 34 58 
#			 (Bit 23-16)
w 30 35 70 
#			 (Bit 15-8)
w 30 36 00 
#			 (Bit 7-0)
w 30 37 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 12
w 30 38 44 
#			 (Bit 23-16)
w 30 39 00 
#			 (Bit 15-8)
w 30 3a bf 
#			 (Bit 7-0)
w 30 3b fe 
#			 (Bit 31-24) ------------ MSB ADC INST No. 13
w 30 3c 00 
#			 (Bit 23-16)
w 30 3d 00 
#			 (Bit 15-8)
w 30 3e 00 
#			 (Bit 7-0)
w 30 3f 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 14
w 30 40 00 
#			 (Bit 23-16)
w 30 41 00 
#			 (Bit 15-8)
w 30 42 00 
#			 (Bit 7-0)
w 30 43 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 15
w 30 44 00 
#			 (Bit 23-16)
w 30 45 00 
#			 (Bit 15-8)
w 30 46 00 
#			 (Bit 7-0)
w 30 47 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 16
w 30 48 05 
#			 (Bit 23-16)
w 30 49 00 
#			 (Bit 15-8)
w 30 4a 00 
#			 (Bit 7-0)
w 30 4b 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 17
w 30 4c 05 
#			 (Bit 23-16)
w 30 4d 00 
#			 (Bit 15-8)
w 30 4e 20 
#			 (Bit 7-0)
w 30 4f 02 
#			 (Bit 31-24) ------------ MSB ADC INST No. 18
w 30 50 05 
#			 (Bit 23-16)
w 30 51 00 
#			 (Bit 15-8)
w 30 52 40 
#			 (Bit 7-0)
w 30 53 04 
#			 (Bit 31-24) ------------ MSB ADC INST No. 19
w 30 54 05 
#			 (Bit 23-16)
w 30 55 00 
#			 (Bit 15-8)
w 30 56 60 
#			 (Bit 7-0)
w 30 57 06 
#			 (Bit 31-24) ------------ MSB ADC INST No. 20
w 30 58 00 
#			 (Bit 23-16)
w 30 59 00 
#			 (Bit 15-8)
w 30 5a 00 
#			 (Bit 7-0)
w 30 5b 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 21
w 30 5c 00 
#			 (Bit 23-16)
w 30 5d 00 
#			 (Bit 15-8)
w 30 5e 00 
#			 (Bit 7-0)
w 30 5f 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 22
w 30 60 00 
#			 (Bit 23-16)
w 30 61 00 
#			 (Bit 15-8)
w 30 62 00 
#			 (Bit 7-0)
w 30 63 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 23
w 30 64 02 
#			 (Bit 23-16)
w 30 65 00 
#			 (Bit 15-8)
w 30 66 00 
#			 (Bit 7-0)
w 30 67 00 
#			 (Bit 31-24) ------------ MSB ADC INST No. 24
w 30 68 00 
#			 (Bit 23-16)
w 30 69 00 
#			 (Bit 15-8)
w 30 6a 00 
#			 (Bit 7-0)
w 30 6b 00 
#			--------------------------------------------------------------- book 80 is selected
w 30 00 00 
w 30 7f 50 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 0
w 30 08 ff 
#			 (Bit 23-16)
w 30 09 ff 
#			 (Bit 15-8)
w 30 0a ff 
#			 (Bit 7-0)
w 30 0b 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 1
w 30 0c 80 
#			 (Bit 23-16)
w 30 0d 00 
#			 (Bit 15-8)
w 30 0e 00 
#			 (Bit 7-0)
w 30 0f 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 2
w 30 10 40 
#			 (Bit 23-16)
w 30 11 00 
#			 (Bit 15-8)
w 30 12 00 
#			 (Bit 7-0)
w 30 13 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 3
w 30 14 7f 
#			 (Bit 23-16)
w 30 15 ff 
#			 (Bit 15-8)
w 30 16 ff 
#			 (Bit 7-0)
w 30 17 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 4
w 30 18 00 
#			 (Bit 23-16)
w 30 19 00 
#			 (Bit 15-8)
w 30 1a 00 
#			 (Bit 7-0)
w 30 1b 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 5
w 30 1c 00 
#			 (Bit 23-16)
w 30 1d 01 
#			 (Bit 15-8)
w 30 1e 1b 
#			 (Bit 7-0)
w 30 1f 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 10
w 30 30 40 
#			 (Bit 23-16)
w 30 31 00 
#			 (Bit 15-8)
w 30 32 00 
#			 (Bit 7-0)
w 30 33 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 11
w 30 34 40 
#			 (Bit 23-16)
w 30 35 00 
#			 (Bit 15-8)
w 30 36 00 
#			 (Bit 7-0)
w 30 37 00 
#			--------------------------------------------------------------- page 9 is selected
w 30 00 09 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 256
w 30 48 ff 
#			 (Bit 23-16)
w 30 49 ff 
#			 (Bit 15-8)
w 30 4a ff 
#			 (Bit 7-0)
w 30 4b 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 257
w 30 4c 80 
#			 (Bit 23-16)
w 30 4d 00 
#			 (Bit 15-8)
w 30 4e 00 
#			 (Bit 7-0)
w 30 4f 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 258
w 30 50 40 
#			 (Bit 23-16)
w 30 51 00 
#			 (Bit 15-8)
w 30 52 00 
#			 (Bit 7-0)
w 30 53 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 259
w 30 54 7f 
#			 (Bit 23-16)
w 30 55 ff 
#			 (Bit 15-8)
w 30 56 ff 
#			 (Bit 7-0)
w 30 57 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 260
w 30 58 00 
#			 (Bit 23-16)
w 30 59 00 
#			 (Bit 15-8)
w 30 5a 00 
#			 (Bit 7-0)
w 30 5b 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 261
w 30 5c 00 
#			 (Bit 23-16)
w 30 5d 01 
#			 (Bit 15-8)
w 30 5e 1b 
#			 (Bit 7-0)
w 30 5f 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 266
w 30 70 40 
#			 (Bit 23-16)
w 30 71 00 
#			 (Bit 15-8)
w 30 72 00 
#			 (Bit 7-0)
w 30 73 00 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 267
w 30 74 40 
#			 (Bit 23-16)
w 30 75 00 
#			 (Bit 15-8)
w 30 76 00 
#			 (Bit 7-0)
w 30 77 00 
#			--------------------------------------------------------------- book 60 is selected
w 30 00 00 
w 30 7f 3c 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB DAC COEFF No. 2048
w 30 08 c0 
#			 (Bit 23-16)
w 30 09 00 
#			 (Bit 15-8)
w 30 0a 00 
#			 (Bit 7-0)
w 30 0b 00 
#			--------------------------------------------------------------- book 120 is selected
w 30 00 00 
w 30 7f 78 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			 (Bit 31-24) ------------ MSB DAC INST No. 0
w 30 08 04 
#			 (Bit 23-16)
w 30 09 00 
#			 (Bit 15-8)
w 30 0a 00 
#			 (Bit 7-0)
w 30 0b 02 
#			 (Bit 31-24) ------------ MSB DAC INST No. 1
w 30 0c 04 
#			 (Bit 23-16)
w 30 0d 00 
#			 (Bit 15-8)
w 30 0e 20 
#			 (Bit 7-0)
w 30 0f 03 
#			 (Bit 31-24) ------------ MSB DAC INST No. 2
w 30 10 04 
#			 (Bit 23-16)
w 30 11 02 
#			 (Bit 15-8)
w 30 12 c0 
#			 (Bit 7-0)
w 30 13 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 3
w 30 14 04 
#			 (Bit 23-16)
w 30 15 02 
#			 (Bit 15-8)
w 30 16 e0 
#			 (Bit 7-0)
w 30 17 01 
#			 (Bit 31-24) ------------ MSB DAC INST No. 4
w 30 18 18 
#			 (Bit 23-16)
w 30 19 01 
#			 (Bit 15-8)
w 30 1a 40 
#			 (Bit 7-0)
w 30 1b 02 
#			 (Bit 31-24) ------------ MSB DAC INST No. 5
w 30 1c 1c 
#			 (Bit 23-16)
w 30 1d 01 
#			 (Bit 15-8)
w 30 1e 60 
#			 (Bit 7-0)
w 30 1f 03 
#			 (Bit 31-24) ------------ MSB DAC INST No. 6
w 30 20 00 
#			 (Bit 23-16)
w 30 21 00 
#			 (Bit 15-8)
w 30 22 00 
#			 (Bit 7-0)
w 30 23 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 7
w 30 24 00 
#			 (Bit 23-16)
w 30 25 00 
#			 (Bit 15-8)
w 30 26 00 
#			 (Bit 7-0)
w 30 27 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 8
w 30 28 00 
#			 (Bit 23-16)
w 30 29 00 
#			 (Bit 15-8)
w 30 2a 00 
#			 (Bit 7-0)
w 30 2b 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 9
w 30 2c 10 
#			 (Bit 23-16)
w 30 2d 00 
#			 (Bit 15-8)
w 30 2e 00 
#			 (Bit 7-0)
w 30 2f 04 
#			 (Bit 31-24) ------------ MSB DAC INST No. 10
w 30 30 58 
#			 (Bit 23-16)
w 30 31 60 
#			 (Bit 15-8)
w 30 32 00 
#			 (Bit 7-0)
w 30 33 05 
#			 (Bit 31-24) ------------ MSB DAC INST No. 11
w 30 34 00 
#			 (Bit 23-16)
w 30 35 00 
#			 (Bit 15-8)
w 30 36 00 
#			 (Bit 7-0)
w 30 37 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 12
w 30 38 00 
#			 (Bit 23-16)
w 30 39 00 
#			 (Bit 15-8)
w 30 3a 00 
#			 (Bit 7-0)
w 30 3b 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 13
w 30 3c 58 
#			 (Bit 23-16)
w 30 3d 70 
#			 (Bit 15-8)
w 30 3e 00 
#			 (Bit 7-0)
w 30 3f 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 14
w 30 40 44 
#			 (Bit 23-16)
w 30 41 00 
#			 (Bit 15-8)
w 30 42 bf 
#			 (Bit 7-0)
w 30 43 fe 
#			 (Bit 31-24) ------------ MSB DAC INST No. 15
w 30 44 09 
#			 (Bit 23-16)
w 30 45 00 
#			 (Bit 15-8)
w 30 46 00 
#			 (Bit 7-0)
w 30 47 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 16
w 30 48 09 
#			 (Bit 23-16)
w 30 49 00 
#			 (Bit 15-8)
w 30 4a 20 
#			 (Bit 7-0)
w 30 4b 01 
#			 (Bit 31-24) ------------ MSB DAC INST No. 17
w 30 4c 09 
#			 (Bit 23-16)
w 30 4d 00 
#			 (Bit 15-8)
w 30 4e 40 
#			 (Bit 7-0)
w 30 4f 04 
#			 (Bit 31-24) ------------ MSB DAC INST No. 18
w 30 50 09 
#			 (Bit 23-16)
w 30 51 00 
#			 (Bit 15-8)
w 30 52 60 
#			 (Bit 7-0)
w 30 53 04 
#			 (Bit 31-24) ------------ MSB DAC INST No. 19
w 30 54 00 
#			 (Bit 23-16)
w 30 55 00 
#			 (Bit 15-8)
w 30 56 00 
#			 (Bit 7-0)
w 30 57 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 20
w 30 58 00 
#			 (Bit 23-16)
w 30 59 00 
#			 (Bit 15-8)
w 30 5a 00 
#			 (Bit 7-0)
w 30 5b 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 21
w 30 5c 00 
#			 (Bit 23-16)
w 30 5d 00 
#			 (Bit 15-8)
w 30 5e 00 
#			 (Bit 7-0)
w 30 5f 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 22
w 30 60 00 
#			 (Bit 23-16)
w 30 61 00 
#			 (Bit 15-8)
w 30 62 00 
#			 (Bit 7-0)
w 30 63 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 23
w 30 64 00 
#			 (Bit 23-16)
w 30 65 00 
#			 (Bit 15-8)
w 30 66 00 
#			 (Bit 7-0)
w 30 67 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 24
w 30 68 00 
#			 (Bit 23-16)
w 30 69 00 
#			 (Bit 15-8)
w 30 6a 00 
#			 (Bit 7-0)
w 30 6b 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 25
w 30 6c 02 
#			 (Bit 23-16)
w 30 6d 00 
#			 (Bit 15-8)
w 30 6e 00 
#			 (Bit 7-0)
w 30 6f 00 
#			 (Bit 31-24) ------------ MSB DAC INST No. 26
w 30 70 00 
#			 (Bit 23-16)
w 30 71 00 
#			 (Bit 15-8)
w 30 72 00 
#			 (Bit 7-0)
w 30 73 00 
#			--------------------------------------------------------------- book 0 is selected
w 30 00 00 
w 30 7f 00 
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01 
#			# reg[  0][  1][  1] = 0x00	; Disable weak AVDD to DVDD connection
w 30 01 00 
#			# reg[  0][  1][121] = 0x33	; MicPGA Quick Charge = 1.1/0.5 ms
w 30 79 33 
#			# reg[  0][  1][122] = 0x01	; Set the REF charging time to 30ms
w 30 7a 01 
#			# reg[  0][  1][ 33] = 0x28	; CP Clock Divider = 4 (8MHz/(6*4)) = 333kHz
w 30 21 28 
#			# reg[  0][  1][ 34] = 0x33	; Buffered AVSS_SENSE, 1x current, DC offset
w 30 22 33 
#			# reg[  0][  1][ 35] = 0x30	; CP Auto-power enabled, Dynamic offset corr.
w 30 23 30 
#			--------------------------------------------------------------- page 0 is selected
w 30 00 00 
#			# reg[  0][  0][  4] = 0x33	; DAC_CLKIN / ADC_CLKIN = PLL_CLK
w 30 04 33 
#			# reg[  0][  0][  5] = 0x00	; PLL_CLKIN = MCLK1, PLL low range
w 30 05 00 
#			# reg[  0][  0][  6] = 0x91	; PLL on, P=1, R=1
w 30 06 91 
#			# reg[  0][  0][  8] = 0x00	; D = 0000 (MSB)
w 30 08 00 
#			# reg[  0][  0][  9] = 0x00	; D = 0000 (LSB)
w 30 09 00 
#			# reg[  0][  0][  7] = 0x08	; J=8
w 30 07 08 
#			# reg[  0][  0][ 13] = 0x03	; DOSR = 768 (MSB)
w 30 0d 03 
#			# reg[  0][  0][ 14] = 0x00	; DOSR = 768 (LSB)
w 30 0e 00 
#			# reg[  0][  0][ 18] = 0x02	; NADC = 2, divider powered off
w 30 12 02 
#			# reg[  0][  0][ 19] = 0xb0	; MADC = 48, divider powered on
w 30 13 b0 
#			# reg[  0][  0][ 20] = 0x80	; AOSR = 128
w 30 14 80 
#			# reg[  0][  0][ 12] = 0x88	; MDAC = 8, divider powered on
w 30 0c 88 
#			# reg[  0][  0][ 11] = 0x02	; NDAC = 2, divider powered off
w 30 0b 02 
#			# reg[  0][  0][ 11] = 0x82	; NDAC = 2, divider powered on
w 30 0b 82 
#			--------------------------------------------------------------- page 4 is selected
w 30 00 04 
#			# reg[0][4][17] = 0x00 ; ASI2 = I2S
w 30 11 00 
#			# reg[0][4][69] = 0x04 ; WCLK2 acts as ASI Secondary WCLK as defined in Reg26 D5
w 30 45 04 
#			# reg[0][4][70] = 0x04 ; BCLK2 is acts as ASI Secondary BCLK as defined in Reg26 D2
w 30 46 04 
#			# reg[0][4][26] = 0x00 ; SELECT WCLK2 and BCLK2 as input for ASI2
w 30 1a 00 
#			# reg[0][4][71] = 0x22 ; DOUT2 pin Output = ASI2 Data Output
w 30 47 22 
#			# reg[0][4][72] = 0x20 ; DIN2 Enabled
w 30 48 20 
#			# reg[0][4][23] = 0x01 ; ASI2_IN_CH<L1,R1> = miniDSP_A_out_ch<L1,R1>
w 30 17 01 
#			# reg[0][4][24] = 0x50 ; ASI2_OUT_CH<L1> = Channel<L1> ; ASI2_OUT_CH<R1> = Channel<R1>
w 30 18 50 
#			# reg[0][4][118]= 0x06 ; miniDSP_D_in_sec_ch<L2,R2> = ASI2_OUT_CH<L1,R1>
w 30 76 06 
#			# reg[0][4][23]= 0x05 ; ASI2_IN_CH<L1,R1> = miniDSP_A_out_ch<L1,R1>
w 30 17 05 
